Nanopatterning of epitaxial CoSi2 using oxidation in a local stress field and fabrication of nanometer metal-oxide-semiconductor field-effect transistors

A patterning method for the generation of epitaxial CoSi2 nanostructures was developed based on anisotropic diffusion of Co/Si atoms in a stress field during rapid thermal oxidation (RTO). The stress field is generated along the edge of a mask consisting of a thin SiO2 layer and a Si3N4 layer. During RTO of the masked silicide structure, a well-defined separation of the silicide layer forms along the edge of the mask. The technique was used to make 50-nm channel-length metal-oxide-semiconductor field-effect transistors (MOSFETs). These highly uniform gaps define the channel region of the fabricated device. Two types of MOSFETs have been fabricated: symmetric transistor structures, using the separated silicide layers as Schottky source and drain, and asymmetric transistors, with n+ source and Schottky drain. The asymmetric transistors were fabricated by an ion implantation into the unprotected CoSi2 layer and a subsequent out diffusion to form the n+ source. The detailed fabrication process as well as the I–V characteristics of both the symmetric and asymmetric transistor structures will be presented. © 2004 American Institute of Physics. [DOI: 10.1063/1.1808246]